sashing-ci | linux-clk

20261023-ups_mp25_clk_update-v2-1-398d348ea8fd@foss.st.com

✔ apply-series

'apply-series ../commits ...' · raw

apply-series ../commits 20261023-ups_mp25_clk_update-v2-1-398d348ea8fd@foss.st.com
 in dir /home/sashing/series/build (timeout 1200 secs)
 watching logfiles {}
 argv: [b'apply-series', b'../commits', b'20261023-ups_mp25_clk_update-v2-1-398d348ea8fd@foss.st.com']
 environment:
  BUILDBOT_BASEDIR=/home/sashing
  BUILDMASTER=localhost
  DEBIAN_FRONTEND=noninteractive
  HOME=/home/sashing
  HOSTNAME=sashing
  LC_CTYPE=C.UTF-8
  PATH=/opt/sashing/tasks:/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin:/opt/venv/bin
  PWD=/home/sashing/series/build
  WORKERNAME=local1
  container=podman
 using PTY: False
Single-message mode, ignoring any follow-ups
Looking up 20261023-ups_mp25_clk_update-v2-1-398d348ea8fd@foss.st.com
1 messages in the thread
---
Revision of 20261023-ups_mp25_clk_update-v2-1-398d348ea8fd@foss.st.com: v2
Looking up 20261023-ups_mp25_clk_update-v2-1-398d348ea8fd@foss.st.com
Checking for newer revisions
Grabbing search results from lore.kernel.org
Analyzing 9 messages in the thread
Looking for additional code-review trailers on lore.kernel.org
Analyzing 8 code-review messages
Checking attestation on all messages, may take a moment...
---
  x [PATCH v2 1/7] clk: stm32mp25: define the number of clocks in the driver
    + Message-ID: <20261023-ups_mp25_clk_update-v2-1-398d348ea8fd@foss.st.com>
  x [PATCH v2 2/7] dt-bindings: stm32: add kernel clocks for ETR and STM
    + Message-ID: <20261023-ups_mp25_clk_update-v2-2-398d348ea8fd@foss.st.com>
  x [PATCH v2 3/7] clk: stm32mp25: update register with reference manual
    + Message-ID: <20261023-ups_mp25_clk_update-v2-3-398d348ea8fd@foss.st.com>
  x [PATCH v2 4/7] dt-bindings: stm32: add clock binding for Cortex-CM0 on stm32mp25 platform
    + Message-ID: <20261023-ups_mp25_clk_update-v2-4-398d348ea8fd@foss.st.com>
  x [PATCH v2 5/7] clk: stm32mp25: add clock for D3 peripherals allocation for Cortex-CM0
    + Message-ID: <20261023-ups_mp25_clk_update-v2-5-398d348ea8fd@foss.st.com>
  x [PATCH v2 6/7] dt-bindings: stm32: add binding for usb2phy1stp clock on stm32mp25
    + Message-ID: <20261023-ups_mp25_clk_update-v2-6-398d348ea8fd@foss.st.com>
  x [PATCH v2 7/7] clk: stm32mp25: add ck_ker_usb2phy1_stp clock
    + Message-ID: <20261023-ups_mp25_clk_update-v2-7-398d348ea8fd@foss.st.com>
  ---
  x No key: ed25519/gabriel.fernandez@foss.st.com
  v Signed: DKIM/foss.st.com
---
Total patches: 7
---
Applying: clk: stm32mp25: define the number of clocks in the driver
Applying: dt-bindings: stm32: add kernel clocks for ETR and STM
Applying: clk: stm32mp25: update register with reference manual
Applying: dt-bindings: stm32: add clock binding for Cortex-CM0 on stm32mp25 platform
Applying: clk: stm32mp25: add clock for D3 peripherals allocation for Cortex-CM0
Applying: dt-bindings: stm32: add binding for usb2phy1stp clock on stm32mp25
Applying: clk: stm32mp25: add ck_ker_usb2phy1_stp clock
program finished with exit code 0
elapsedTime=1.762624